Module codegen_ana 

LOGOS → analog spatial fabric (FPAA-style mixed-signal coprocessor) — the analog lane.

Analog computing is inherently spatial: there is no program counter to run through continuous physics, so a computation is laid out as a topology and signals flow through it. This module lowers the float-dataflow region of a LOGOS program onto an analog execution plane (Kirchhoff current-summing adds, transconductance multiplies, OTA-C integrators) framed by a digital control plane (DAC/ADC strobes, sample-and-hold ticks).

The trust model

Everything except one arrow stays exact: the digital control plane, the gain-schedule rationals, calibration fixed-point, and the DAC/ADC quantizer functions. The single analog-uncertain arrow — DAC-out to ADC-in — is bounded (an ErrorBudget the compiler emits), certified non-clipping (a range certificate replayed by an independent checker), and sampled/simulated (fixed-seed Monte-Carlo, SPICE). ε is a compiler output derived from the artifact, never a hand-tuned test tolerance; logos_approx_eq is the ideal-tier floor and is never widened.

Proof-regime firewall

crate::codegen_sva’s value is exact ≡VM (SAT bitblast, byte-identical eval, iverilog diff). The analog lane is tolerance-≡ by physics, so it lives in its OWN ADL (target::AnalogTarget) and imports the digital fabric’s extraction IR read-only — codegen_sva itself is untouched.

Totality discipline (mirrors the Tenstorrent / RISC-V tiers)

Every program gets a correct artifact or a NAMED refusal, never a silent miscompile: concurrency/networking → AnaLowerError::Unsupported; no float dataflow → AnaLowerError::NoAnalogRegion; float dataflow without declared input ranges → AnaLowerError::UnboundedInput (gain scaling without bounds would be a guess, and this lane does not guess). The analog_op_coverage_lock ratchet classifies all VM ops four ways (OnPlane / Boundary / ControlPlane / OffPlane) so nothing is silently dropped.

Re-exports

pub use calibrate::apply_calibration;

pub use calibrate::calibrate;

pub use calibrate::error_budget_calibrated;

pub use calibrate::v1_trim;

pub use calibrate::CalibrationTable;

pub use calibrate::TrimSpec;

pub use cell::ASrc;

pub use cell::AnalogCell;

pub use cell::AnalogNetlist;

pub use control::ControlProgram;

pub use control::CtrlStep;

pub use error_budget::error_budget;

pub use error_budget::error_budget_chopped;

pub use error_budget::error_budget_nonideal;

pub use error_budget::ErrorSource;

pub use error_budget::ErrorTerm;

pub use error_budget::OutputBudget;

pub use eval::eval_analog_dc;

pub use eval::eval_analog_quantized;

pub use eval::ConverterGrid;

pub use gain::scale_pass;

pub use gain::to_range_claim;

pub use gain::GainSchedule;

pub use gain::MathBound;

pub use gain::NetBound;

pub use gain::RangeCertificate;

pub use int_lane::analog_int_netlist_from_source;

pub use integrator::analog_integrator_from_source;

pub use integrator::eval_analog_integrated;

pub use integrator::eval_analog_integrated_quantized;

pub use integrator::integrator_error_budget;

pub use integrator::integrator_scale_pass;

pub use integrator::AnalogIntegrator;

pub use integrator::InitSrc;

pub use lower::analog_netlist_from_source;

pub use nonideal::eval_analog_instance;

pub use nonideal::eval_analog_instance_chopped;

pub use nonideal::sample_instance;

pub use nonideal::sky130_nonideal;

pub use nonideal::InstanceSample;

pub use nonideal::NonIdealityModel;

pub use nonideal::KSIGMA;

pub use place::place_analog;

pub use place::place_blind;

pub use place::AnalogPlacement;

pub use reduction::analog_int_reduction_from_source;

pub use reduction::analog_reduction_from_source;

pub use reduction::eval_analog_sampled;

pub use reduction::eval_analog_sampled_quantized;

pub use reduction::reduction_error_budget;

pub use reduction::reduction_scale_pass;

pub use reduction::AnalogReduction;

pub use spice_emit::emit_spice_dc;

pub use spice_emit::SPICE_ABSTOL;

pub use spice_emit::SPICE_RELTOL;

pub use spice_emit::SPICE_VNTOL;

pub use target::AnaUnplaceable;

pub use target::AnalogCapability;

pub use target::AnalogCellKind;

pub use target::AnalogTarget;

pub use target::ALL_ANALOG_CELL_KINDS;

pub use xbar::fold_crossbar;

pub use xbar::fold_crossbar_for;

Modules

calibrate

Factory calibration — manufacturing ADJUSTABLE circuits, not impossibly perfect ones.

cell

The analog tile netlist — codegen_ana’s SSA IR.

control

The digital control plane’s frame schedule — DAC/ADC strobing around the analog plane.

dims

The ADL dimension census — every numeric field of the characterized descriptors (AnalogTarget, NonIdealityModel) declares its physical dimension, ONCE, here.

dynamics

The relaxation lane — continuous-time state evolution as a compute primitive (Solve A·x = b by settling).

effects

The physics-effect provenance grid.

error_budget

The error budget — ε as a COMPILER OUTPUT, never a hand-tuned test tolerance.

eval

Tier-1 behavioral evaluation of an analog netlist.

gain

Gain scaling + the range-safety certificate — the compiler side of the analog trust story.

int_lane

The certified-EXACT integer lane — small-range integer dataflow with the ADC as restorer.

integrator

The ZOH integrator lane — counted Euler loops as OTA-C integration.

lower

Float-function → analog-netlist lowering — the analog lane’s Futamura moment.

nonideal

The non-ideality model — sourced physics, seeded instances, and the instance evaluator.

ontology

The typed ontology of analog circuits.

place

Non-ideality-aware placement — operand adjacency as a matching resource.

reduction

The streamed reduction — the flagship MAC lane.

spice_emit

Behavioral ngspice emission — the analog lane’s “iverilog tier”.

stack

The constructive 2.5D/3D stack ADL.

stack_place

3D placement over composed analog tiers — vertical interconnect as a COUNTED, refusable resource, and the cross-tier Pelgrom category priced into the budget.

target

The AnalogTarget ADL — the analog lane’s described-fabric spine, shaped as a characterized analog PDK for the compiler, not a feature checklist.

thermal

The certified thermal map — G·ΔT = P over exact ℚ, judged independently.

wta

Winner-take-all — the O7 stretch: the MARGIN CERTIFICATE arrives before the tile does.

xbar

Crossbar canonicalization — folding a gain/sum tree into single Kirchhoff columns.

Structs

AnalogArtifact

The mixed-signal compilation artifact: the lowered region, its physical schedule and placement, the certificates and the budget, and the behavioral SPICE netlist (emitted at the declared input box’s midpoint).

AssumedLenRange

A declared COLLECTION-LENGTH range: Assume length of xs is between A and B. — the streamed lane’s frame bound (the control plane schedules hi frames; the runtime check enforces the contract on every tier, so a longer sequence fails loudly before the DAC ever fires).

AssumedRange

A declared input range: Assume x is between lo and hi. (or the Require that spelling — the range IS the enforced RuntimeAssert shape, not the head keyword). The gain-scaling pass’s input: a variable whose runtime value is CONTRACT-bounded to [lo, hi] on every tier.

Enums

AnaLowerError

Why the analog tier declines a program — a SOUND refusal, never wrong silicon.

RegionLane

Which certified lane a region compiled through.

Functions

analog_artifact_from_source

The full DAG-lane pipeline for one region function on one target: lower → schedule/certify → place → budget (physical, with the sourced non-ideality model) → behavioral SPICE.

analog_int_artifact_from_source

The INTEGER pipeline for one region function: lower through the int lane, schedule, place, take the CALIBRATED physical budget (the product configuration — trims burned at final test), and PROVE exactness through the ½-grid gate before any artifact exists. An integer artifact is therefore certified-exact by construction: its budget is the proof.

analog_refusal

The fail-closed refusal gate every analog compilation runs FIRST. None means the program clears the gate (an analog region exists, with declared ranges, inside the SoC model).

assumed_len_ranges_in

Recover every declared length range from parsed statements (the between desugar over a length of <ident> operand, in an enforced RuntimeAssert).

assumed_ranges

Recover every declared range from a program’s source — the source-level surface of assumed_ranges_in, for callers outside the compile pipeline.

assumed_ranges_in

Recover every declared range from parsed statements: each enforced (hard) RuntimeAssert whose condition is the between desugar shape lo <= x and x <= hi with literal bounds. Walks function bodies and nested blocks — a contract is a contract wherever it is stated.

contract_free_twin

The contract-free twin of a source: the Assume range-check lines stripped. The checks belong to the CONTROL PLANE (the digital side validates each word before the DAC fires, and runs them as ordinary bytecode in the digital fallback), so the region DATAFLOW both lanes lower is this twin — exposed for the mixed-signal composition to build its fallback configs from the same text the analog lane extracts.

exactness_gate

The integer lane’s ½-grid exactness proof: integer inputs on a grid-preserving region read back EXACTLY through the rounding ADC iff the compiler’s own error budget stays under half a grid step. Ok(()) is the exactness CERTIFICATE’S admission condition; the refusal carries the budget that broke so the diagnostic names the cost.

try_region

Try to compile ONE region function on target, deciding the lane from its parameter family: float params → the ε-certified pipeline; else the certified-exact integer pipeline. PANIC-SAFE: extraction shapes outside the supported family become a typed refusal, never a crash — this is the entry the mixed-signal partition (and compile_to_analog) dispatches through for arbitrary programs.

unsupported_reason

Returns Some(reason) if program uses an op with no home anywhere in the mixed-signal SoC model — concurrency (the analog control plane is a frame sequencer, not a thread pool) and networking (host-only IO). Everything else either maps to the plane, frames its boundary, or runs digitally VM-identical on the control side.