pub fn eval_analog_quantized(
schedule: &GainSchedule,
target: &AnalogTarget,
inputs: &[f64],
) -> f64Expand description
DC operating point through the CONVERTER path: each input is driven by the DAC (rounded to
its LSB at the block scale), the plane settles in the VOLT domain (the Mul tile divides by
its programmed V_ref, returning products to the block scale), and the output is read
through the ADC (rounded to its LSB) and descaled exactly (power-of-two shift).
Rounding is round-half-away-from-zero (f64::round) — deterministic, and the half-LSB error
model in super::error_budget covers it. This is the first physically-shaped tier: its
deviation from eval_analog_dc must stay inside the compiler’s own OutputBudget.