Module spice_emit 

Behavioral ngspice emission — the analog lane’s “iverilog tier”.

The emitted netlist is a BEHAVIORAL macromodel: each tile is a controlled source computing its ideal volt-domain equation (Kirchhoff sum = weighted B-source, the four-quadrant multiplier = V(a)·V(b)/Vref, constant gain = k·V(a)), inputs are DC sources at the block scale, and the operating point is the settled plane. No transistor models are invented — the sky130 transistor tier arrives PDK-gated with real device cards under the same node names. Structural honesty: simulator tolerances are PINNED IN THE NETLIST (.options), and the comparison term a test may add derives from those pinned values, never hand-tuning.

Constants

SPICE_ABSTOL

SPICE_RELTOL

The pinned simulator options — tests read these back from the emitted netlist to derive their simulator-discretization term.

SPICE_VNTOL

Functions

emit_spice_dc

Emit a DC operating-point netlist for one input point: sources at the block scale, one behavioral element per tile, the output node written via wrdata.