pub enum AnalogCell {
Sum {
inputs: Vec<ASrc>,
weights: Vec<f64>,
},
Mul {
a: ASrc,
b: ASrc,
},
GainConst {
a: ASrc,
k: f64,
},
Select {
c: ASrc,
t: ASrc,
f: ASrc,
},
Exp {
a: ASrc,
},
Log {
a: ASrc,
},
Tanh {
a: ASrc,
},
Sqrt {
a: ASrc,
},
Div {
a: ASrc,
b: ASrc,
},
}Expand description
One analog tile. Ideal (math-domain) semantics are given per variant; physical parameters (gm, C, rails) attach at the target/gain layers, not here.
Variants§
Sum
Kirchhoff current-summing node with programmed input-conductance weights:
v = Σ wᵢ·xᵢ. Signed weights are free (differential wiring).
Mul
Four-quadrant transconductance multiplier for variable×variable: v = a·b.
GainConst
Programmed-conductance constant gain: v = k·a.
Select
Comparator-driven analog switch: v = if c < 0 { t } else { f } (the O5 tile). The
condition is a DIFFERENCE net (the lowering emits c = ca − cb as a Sum); strict vs
inclusive comparison is indistinguishable on the analog plane — the boundary lives
inside the comparator’s ambiguity band, which the budget prices (CompareBand).
Exp
Translinear exponential (subthreshold-MOS / diff-pair current law): v = eˣ. NOT
scale-invariant — translinear nets run at unit block scale (volt ≡ math), enforced by
the schedule (the O6 pinning rule).
Log
Translinear logarithm (forward-diode law): v = ln x, domain x > 0 — certified
fail-closed by the range rules.
Tanh
Differential-pair saturation: v = tanh x.
Sqrt
Translinear square root (Gilbert 1975 loop): v = √x, domain x > 0 for a bounded
error slope (the budget’s Lipschitz factor diverges at 0).
Div
Translinear ratio (Gilbert 1975): v = a / b; the divisor’s certified box must clear
zero (DivisorRangeSpansZero otherwise — the starvation refusal).
Implementations§
Trait Implementations§
Source§impl Clone for AnalogCell
impl Clone for AnalogCell
Source§fn clone(&self) -> AnalogCell
fn clone(&self) -> AnalogCell
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read moreSource§impl Debug for AnalogCell
impl Debug for AnalogCell
Source§impl PartialEq for AnalogCell
impl PartialEq for AnalogCell
impl StructuralPartialEq for AnalogCell
Auto Trait Implementations§
impl Freeze for AnalogCell
impl RefUnwindSafe for AnalogCell
impl Send for AnalogCell
impl Sync for AnalogCell
impl Unpin for AnalogCell
impl UnsafeUnpin for AnalogCell
impl UnwindSafe for AnalogCell
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
§impl<T> Downcast for Twhere
T: Any,
impl<T> Downcast for Twhere
T: Any,
§fn into_any(self: Box<T>) -> Box<dyn Any>
fn into_any(self: Box<T>) -> Box<dyn Any>
Box<dyn Trait> (where Trait: Downcast) to Box<dyn Any>. Box<dyn Any> can
then be further downcast into Box<ConcreteType> where ConcreteType implements Trait.§fn into_any_rc(self: Rc<T>) -> Rc<dyn Any>
fn into_any_rc(self: Rc<T>) -> Rc<dyn Any>
Rc<Trait> (where Trait: Downcast) to Rc<Any>. Rc<Any> can then be
further downcast into Rc<ConcreteType> where ConcreteType implements Trait.§fn as_any(&self) -> &(dyn Any + 'static)
fn as_any(&self) -> &(dyn Any + 'static)
&Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot
generate &Any’s vtable from &Trait’s.§fn as_any_mut(&mut self) -> &mut (dyn Any + 'static)
fn as_any_mut(&mut self) -> &mut (dyn Any + 'static)
&mut Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot
generate &mut Any’s vtable from &mut Trait’s.