pub enum LanesVal {
L8W32(Lanes8Word32),
L4W64(Lanes4Word64),
L16W16(Lanes16Word16),
L4W32(Lanes4Word32),
L16W8(Lanes16Word8),
}Expand description
A SIMD lane vector of any supported lane config — the single runtime carrier the interpreter/VM
match on, mirroring WordVal. Binary ops require the same config; a mismatch returns None.
Variants§
L8W32(Lanes8Word32)
8 lanes of Word32 (one __m256i).
L4W64(Lanes4Word64)
4 lanes of Word64 (one __m256i) — the Poly1305 accumulator.
L16W16(Lanes16Word16)
16 lanes of Word16 (one __m256i) — NTT coefficients.
L4W32(Lanes4Word32)
4 lanes of Word32 (one __m128i) — the SHA-1 state/message register (SHA-NI ops).
L16W8(Lanes16Word8)
16 lanes of Word8 (one __m128i) — the byte-shuffle register for SIMD text codecs.
Implementations§
Source§impl LanesVal
impl LanesVal
Sourcepub fn lane(self, i: usize) -> u64
pub fn lane(self, i: usize) -> u64
Lane i’s value, zero-extended to u64 (for unpacking back into a Seq and for display).
Sourcepub fn shuffle(self, idx: Self) -> Option<Self>
pub fn shuffle(self, idx: Self) -> Option<Self>
Byte-shuffle vocabulary, defined only on the L16W8 config (SIMD hex codec); None otherwise.
pub fn byte_and(self, o: Self) -> Option<Self>
pub fn shr_bytes(self, n: u32) -> Option<Self>
pub fn interleave_lo(self, o: Self) -> Option<Self>
pub fn interleave_hi(self, o: Self) -> Option<Self>
pub fn byte_add(self, o: Self) -> Option<Self>
pub fn maddubs_bytes(self, o: Self) -> Option<Self>
pub fn packus_bytes(self, o: Self) -> Option<Self>
Sourcepub fn sha1rnds4(self, msg: Self, func: u32) -> Option<Self>
pub fn sha1rnds4(self, msg: Self, func: u32) -> Option<Self>
The four SHA-1 (SHA-NI) operations, defined only on the L4W32 config; None otherwise.
pub fn sha1msg1(self, o: Self) -> Option<Self>
pub fn sha1msg2(self, o: Self) -> Option<Self>
pub fn sha1nexte(self, o: Self) -> Option<Self>
Sourcepub fn bitxor(self, o: Self) -> Option<Self>
pub fn bitxor(self, o: Self) -> Option<Self>
Lane-wise XOR; None on a config mismatch (or a config that does not define XOR).
Sourcepub fn bitand(self, o: Self) -> Option<Self>
pub fn bitand(self, o: Self) -> Option<Self>
Lane-wise AND (the MD5 F/G mixing) — None on a config mismatch or a config without AND.
Sourcepub fn bitor(self, o: Self) -> Option<Self>
pub fn bitor(self, o: Self) -> Option<Self>
Lane-wise OR — None on a config mismatch or a config without OR.
Sourcepub fn sub(self, o: Self) -> Option<Self>
pub fn sub(self, o: Self) -> Option<Self>
Lane-wise wrapping subtract; None on a config mismatch (the i16 NTT and the i32 ML-DSA NTT).
Sourcepub fn mullo(self, o: Self) -> Option<Self>
pub fn mullo(self, o: Self) -> Option<Self>
Lane-wise low-16 multiply (vpmullw); None unless Word16.
Sourcepub fn mulhi(self, o: Self) -> Option<Self>
pub fn mulhi(self, o: Self) -> Option<Self>
Lane-wise SIGNED high-16 multiply (vpmulhw, the Montgomery mulhi); None unless Word16.
Sourcepub fn ntt_bcast_lo(self, h: usize) -> Option<Self>
pub fn ntt_bcast_lo(self, h: usize) -> Option<Self>
Within-vector NTT source-low duplication at stride h (vperm2i128/vpshufd); None
unless Word16.
Sourcepub fn ntt_bcast_hi(self, h: usize) -> Option<Self>
pub fn ntt_bcast_hi(self, h: usize) -> Option<Self>
Within-vector NTT source-high duplication at stride h; None unless Word16/Word32.
Sourcepub fn ntt_blend(self, o: Self, h: usize) -> Option<Self>
pub fn ntt_blend(self, o: Self, h: usize) -> Option<Self>
Within-vector NTT half-recombine at stride h (vperm2i128/vpblendd); None unless both
are Word16/Word32.
Sourcepub fn rotl(self, n: u32) -> Option<Self>
pub fn rotl(self, n: u32) -> Option<Self>
Lane-wise left rotation by n; None for a config that does not define rotation.
Sourcepub fn mul_lo32_wide(self, o: Self) -> Option<Self>
pub fn mul_lo32_wide(self, o: Self) -> Option<Self>
Lane-wise widening low-32 multiply (the Poly1305 4-way limb product); None unless Word64.