Enum HardwareKind 

pub enum HardwareKind {
    EnglishSpec,
    SignalPlan,
    Verilog,
    RegisterAlloc,
    Pigeonhole,
}

The kinds of design Hardware mode reads, by what the text names.

Variants

EnglishSpec

An English temporal spec (“Always, if request is high, …”), synthesized to an SVA.

SignalPlan

Movements and their conflicts, designed into a phase plan and a controller.

Verilog

A Verilog module with an assertion, model-checked.

RegisterAlloc

A registers: budget and live ranges, allocated and certified.

Pigeonhole

A pigeons: count, refuted and certified.

Implementations

impl HardwareKind

pub fn result_title(self) -> &'static str

The title of the panel that holds the result.

pub fn compiles(self) -> bool

Whether Compile makes something (a Rust runtime monitor), so the result panel offers a Rust view.

Trait Implementations

impl Clone for HardwareKind

fn clone(&self) -> HardwareKind

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for HardwareKind

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for HardwareKind

fn eq(&self, other: &HardwareKind) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for HardwareKind

impl Eq for HardwareKind

impl StructuralPartialEq for HardwareKind