Struct Lanes4Word64 

#[repr(C, align(32))]
pub struct Lanes4Word64(pub [u64; 4]);

Four lanes of Word64 (one 256-bit SIMD register) — the Poly1305 accumulator lane vector. Carries [u64; 4]; ops have an AVX2 fast path proven byte-identical to the scalar lanes.

Tuple Fields

0: [u64; 4]

Implementations

impl Lanes4Word64

pub const LANES: usize = 4

The number of lanes.

pub fn from_words(s: &[Word64]) -> Lanes4Word64

Pack the first four Word64s of a slice into a lane vector (shorter slices zero-fill).

pub fn to_words(self) -> [Word64; 4]

The lanes as four Word64s.

pub fn lane(self, i: usize) -> Word64

Lane i (0-based) as a Word64.

pub fn hsum(self) -> u64

The horizontal sum of the four lanes (wrapping in ℤ/2⁶⁴) — combines the per-lane partial products in a 4-way Poly1305 multiply. Reads the scalar array; no SIMD needed.

pub fn add(self, o: Lanes4Word64) -> Lanes4Word64

Lane-wise wrapping add in ℤ/2⁶⁴ (vpaddq). #[inline(always)] + compile-time cfg(target_feature="avx2") (no runtime is_x86_feature_detected branch, no #[target_feature] call boundary) so the 4-way Poly1305 accumulator stays register-resident under +avx2.

pub fn mul_lo32_wide(self, o: Lanes4Word64) -> Lanes4Word64

Lane-wise widening multiply of the low 32 bits: (aₗₒ·bₗₒ) per lane → a 64-bit product (vpmuludq). #[inline(always)] + compile-time cfg(target_feature="avx2") so the Poly1305 4-way limb multiply inlines register-resident under +avx2.

pub fn splat(x: u64) -> Lanes4Word64

Broadcast one u64 into all four lanes (Keccak’s ι round-constant XOR is a splat).

pub fn bitxor(self, o: Lanes4Word64) -> Lanes4Word64

Lane-wise XOR (vpxor) — θ column parity, χ, and ι.

pub fn and(self, o: Lanes4Word64) -> Lanes4Word64

Lane-wise AND (vpand).

pub fn andnot(self, o: Lanes4Word64) -> Lanes4Word64

Lane-wise AND-NOT (¬self) & o (vpandn) — Keccak’s χ nonlinearity ¬bᵢ₊₁ ∧ bᵢ₊₂ in one op.

pub fn rotl(self, n: u32) -> Lanes4Word64

Lane-wise left rotation by n (mod 64) — Keccak’s ρ offsets and θ’s D term. (x<<n)|(x>>(64−n)) via vpsllq/vpsrlq (n = 0 is the identity — the 64−n = 64 shift zeroes).

Trait Implementations

impl Add for Lanes4Word64

type Output = Lanes4Word64

The resulting type after applying the + operator.

fn add(self, o: Lanes4Word64) -> Lanes4Word64

Performs the + operation.

impl BitAnd for Lanes4Word64

type Output = Lanes4Word64

The resulting type after applying the & operator.

fn bitand(self, o: Lanes4Word64) -> Lanes4Word64

Performs the & operation.

impl BitXor for Lanes4Word64

type Output = Lanes4Word64

The resulting type after applying the ^ operator.

fn bitxor(self, o: Lanes4Word64) -> Lanes4Word64

Performs the ^ operation.

impl Clone for Lanes4Word64

fn clone(&self) -> Lanes4Word64

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Lanes4Word64

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Hash for Lanes4Word64

fn hash<__H>(&self, state: &mut __H)

where __H: Hasher,

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for Lanes4Word64

fn eq(&self, other: &Lanes4Word64) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl WordRotate for Lanes4Word64

fn rotl(self, n: u32) -> Self

fn rotr(self, n: u32) -> Self

impl Copy for Lanes4Word64

impl Eq for Lanes4Word64

impl StructuralPartialEq for Lanes4Word64