Function compile_straightline_pinned_float 

pub fn compile_straightline_pinned_float(
    ops: &[MicroOp],
    pins: &[u16],
    fpins: &[u16],
    shared_status: Option<Arc<AtomicI64>>,
) -> Result<CompiledChain, JitCompileError>

The full register-threading compiler with BOTH integer pins (pins, threaded through the GP registers r0..r3) and FLOAT pins (fpins, threaded through the XMM registers f0..f3). The two budgets are independent — the threaded ABI carries fn(base, sp, r0..r3, f0..f3), so base/sp consume 2 of the 6 GP arg registers (leaving r0..r3) while all four XMM pins sit in the 8 free XMM arg registers and never compete with the integer pins.

A FLOAT slot pinned to fN keeps its f64 live in that XMM register across every stencil — the pure float arith variants (V_FBINOP) read and write it directly, and the mem-form float stencils (sqrt, divf, the float compares, array load/store) THREAD f0..f3 unchanged, so any float pin they do not themselves touch survives with no frame traffic. The ones a mem-form op does read/write are spilled before / reloaded after, exactly like the GP pins.