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Shim

logicaffeine_compile::tensor_graph::shim

Trait Shim 

Source 
pub trait Shim {
    // Required methods
    fn name(&self) -> String;
    fn supports(&self, class: ClassId) -> Support;
    fn fits(&self, op: &Op, g: &TensorGraph) -> Result<(), String>;
    fn numerics(&self) -> Option<Contract>;

    // Provided methods
    fn activation(
        &self,
        _consumer: &Op,
        _operand: usize,
        _g: &TensorGraph,
    ) -> Option<QuantFormat> { ... }
    fn rules(&self) -> Vec<(Position, ChipRule<'_>)> { ... }
}
Expand description

What a chip allows.

Required Methods§

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fn name(&self) -> String

The chip and the configuration it answers for, e.g. cuda-lane:rtx3060:TwoPassInt8.

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fn supports(&self, class: ClassId) -> Support

What the chip’s link does with class. Every chip answers by a match over every class with no catch-all arm, so a class added to the registry fails the build until each chip answers it.

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fn fits(&self, op: &Op, g: &TensorGraph) -> Result<(), String>

Whether the chip’s link builds op as it stands — its shapes, its accesses, its destination: Ok, or why not.

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fn numerics(&self) -> Option<Contract>

The numerics contract of the knob point the chip answers for, or None while the chip has not declared it.

Provided Methods§

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fn activation( &self, _consumer: &Op, _operand: usize, _g: &TensorGraph, ) -> Option<QuantFormat>

The quantized form consumer reads its operand operand in, or None for one it reads as its values.

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fn rules(&self) -> Vec<(Position, ChipRule<'_>)>

The chip’s own rules, each linked into the table where its position says.

Implementors§