pub const WPE_CLOCK: HarnessClock;Expand description
The harness clock the engine runs on. Caravel’s chip signoff times the core clock, wb_clk_i, at 25 ns, and the
management SoC and the bus run on it; user_clock2 is the PLL’s 90-degree phase through a divider of its own, so
the engine runs at its own period while the management SoC stays at the one the chip is signed for.