pub enum FuncUnit {
Show 21 variants
DivS,
ModS,
FloorDivS,
Pow,
MulHiU,
ApproxEqF,
FAddF,
FSubF,
FMulF,
FDivF,
FSqrtF,
FFloorF,
MulOvfS,
IntToF,
FLtF,
FGtF,
FLeF,
FGeF,
FEqF,
FNeF,
PopCount,
}Expand description
A SEQUENTIAL functional unit — signed division and remainder. Unlike an AluOp, division is NOT a
combinational tile: on silicon it is the multi-cycle shared_divider (already proven ≡ the VM by
rtl.rs::the_signed_divider_is_proven_correct_by_our_sat), issued as a functional unit. Keeping it a
distinct fabric cell lets the emitter wire that sequential unit rather than synthesize a giant
combinational divider. Semantics mirror the soft-core’s shared_divider exactly, INCLUDING the
divide-by-zero trap (b == 0 → 0).
Variants§
DivS
Truncated signed quotient (Op::Div / Op::ExactDiv, a / b rounding toward zero).
ModS
Signed remainder taking the dividend’s sign (Op::Mod, a % b).
FloorDivS
Floor division (Op::FloorDiv, a // b rounding toward negative infinity).
Pow
Exponentiation (Op::Pow, a ** b) — a SEQUENTIAL multiplier (b multiplies) at the RTL level; the
eval is the closed-form wrapping power. The VM promotes to bigint on overflow, so a fabric witness
keeps a**b inside i64 (a small const exponent over the bounded fuzz range).
MulHiU
UNSIGNED high-half multiply (a·b) >> 64 (both operands as u64) — the reciprocal step of
Op::MagicDivU’s magic division. On silicon it is the high word of the 64×64 multiplier; the eval
takes the top 64 bits of the 128-bit unsigned product. No divider trap applies (it is a multiply).
ApproxEqF
APPROXIMATE equality (Op::ApproxEq, a is approximately b) over NUMERIC operands: both converted to
f64, compared by the relative+absolute tolerance logos_approx_eq. Yields 0/1. (Float-typed operands
need the float lane; the fabric refuses them at the Constant::Float load, so only the numeric-int
case reaches here.) No divider trap — it is a comparison.
FAddF
The FLOAT LANE — IEEE-754 f64 operating on the bit-pattern each operand carries (f64::from_bits).
Binary FAddF/FSubF/FMulF/FDivF return the result’s bits; unary FSqrtF returns bits; FFloorF
returns the floored value as an Int (the float→int bridge, matching the floor builtin). No divider
trap (float /0.0 is ±inf, not the integer trap).
FSubF
FMulF
FDivF
FSqrtF
FFloorF
MulOvfS
Signed 128-bit MULTIPLY OVERFLOW flag: 1 iff (a as i128) * (b as i128) does NOT fit i64 (the
BigIntWide lane’s “did this product promote to a BigInt?” test — the VM’s Value::mul returns an
Int when it fits and a BigInt when it does not). A comparison, so no divider trap.
IntToF
INT→FLOAT promotion: reinterpret the operand as a signed i64 value and return the bit pattern of its
f64 widening ((a as f64).to_bits()). This is the fabric’s static realization of the VM’s dynamic
Int ∘ Float → Float coercion (arith::multiply etc. do *a as f64 when one side is a Float): when a
float op has an integer operand, the fabric promotes that operand through this unit first so the float
functional unit sees two genuine f64 bit patterns. Unary (b ignored); no divider trap.
FLtF
FLOAT COMPARISONS over two f64 bit patterns, yielding the 0/1 predicate the terminator / a Select
consumes. A genuine IEEE-754 compare (f64::from_bits(a) < f64::from_bits(b) etc.) — NOT the integer
bit-pattern ordering a plain Select would use, which is only sound for same-sign operands and silently
wrong once a negative float appears. FEqF/FNeF follow IEEE equality (so NaN != NaN). No divider trap.
FGtF
FLeF
FGeF
FEqF
FNeF
PopCount
POPCOUNT (count_ones): the number of set bits in the operand read as a u64. Unary (b ignored),
combinational (a bit-adder tree), yields an Int in 0..=64 — no divider trap. The static realization
of the VM’s count_ones builtin / the popcount_leaf hot path.
Implementations§
Source§impl FuncUnit
impl FuncUnit
pub fn eval(&self, a: i64, b: i64) -> i64
Sourcepub fn verilog(&self, a: &str, b: &str) -> String
pub fn verilog(&self, a: &str, b: &str) -> String
A COMBINATIONAL-correct Verilog lowering with the b == 0 → 0 guard — semantically identical to
the sequential shared_divider (whose FSM instantiation is the area refinement). 64-bit signed,
so iverilog’s truncated division/remainder is bit-identical to the VM’s Int.
Source§impl FuncUnit
impl FuncUnit
Sourcepub fn eval_checked(&self, a: i64, b: i64) -> Result<i64, Divergence>
pub fn eval_checked(&self, a: i64, b: i64) -> Result<i64, Divergence>
The VM’s value for this unit, or the divergence that keeps the word from being it. Operands follow the
unit’s convention (integers by value, floats as f64 bit patterns); so does the result.
Trait Implementations§
Source§impl<'de> Deserialize<'de> for FuncUnit
impl<'de> Deserialize<'de> for FuncUnit
Source§fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
Source§impl Ord for FuncUnit
impl Ord for FuncUnit
Source§impl PartialOrd for FuncUnit
impl PartialOrd for FuncUnit
impl Copy for FuncUnit
impl Eq for FuncUnit
impl StructuralPartialEq for FuncUnit
Auto Trait Implementations§
impl Freeze for FuncUnit
impl RefUnwindSafe for FuncUnit
impl Send for FuncUnit
impl Sync for FuncUnit
impl Unpin for FuncUnit
impl UnsafeUnpin for FuncUnit
impl UnwindSafe for FuncUnit
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
§impl<Q, K> Comparable<K> for Q
impl<Q, K> Comparable<K> for Q
§impl<T> Downcast for Twhere
T: Any,
impl<T> Downcast for Twhere
T: Any,
§fn into_any(self: Box<T>) -> Box<dyn Any>
fn into_any(self: Box<T>) -> Box<dyn Any>
Box<dyn Trait> (where Trait: Downcast) to Box<dyn Any>. Box<dyn Any> can
then be further downcast into Box<ConcreteType> where ConcreteType implements Trait.§fn into_any_rc(self: Rc<T>) -> Rc<dyn Any>
fn into_any_rc(self: Rc<T>) -> Rc<dyn Any>
Rc<Trait> (where Trait: Downcast) to Rc<Any>. Rc<Any> can then be
further downcast into Rc<ConcreteType> where ConcreteType implements Trait.§fn as_any(&self) -> &(dyn Any + 'static)
fn as_any(&self) -> &(dyn Any + 'static)
&Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot
generate &Any’s vtable from &Trait’s.§fn as_any_mut(&mut self) -> &mut (dyn Any + 'static)
fn as_any_mut(&mut self) -> &mut (dyn Any + 'static)
&mut Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot
generate &mut Any’s vtable from &mut Trait’s.§impl<T> DowncastSync for T
impl<T> DowncastSync for T
§impl<Q, K> Equivalent<K> for Q
impl<Q, K> Equivalent<K> for Q
§fn equivalent(&self, key: &K) -> bool
fn equivalent(&self, key: &K) -> bool
§impl<Q, K> Equivalent<K> for Q
impl<Q, K> Equivalent<K> for Q
§fn equivalent(&self, key: &K) -> bool
fn equivalent(&self, key: &K) -> bool
key and return true if they are equal.