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schedule

logicaffeine_compile::codegen_sva::ddr4_jedec

Function schedule 

Source 
pub fn schedule(
    t: &Ddr4Timing,
    line_bytes: u64,
    streams: &[StreamDesc],
) -> Vec<Ddr4Timed>
Expand description

The controller’s trace for streams (byte addresses in one channel, line_bytes to a burst) at LOOKAHEAD.