pub fn emit_ddr2_controller_verilog(t: &DramTimings) -> StringExpand description
Emit ddr2_ctrl — the request-driven DDR2 controller FSM (timings baked from the table).
pub fn emit_ddr2_controller_verilog(t: &DramTimings) -> StringEmit ddr2_ctrl — the request-driven DDR2 controller FSM (timings baked from the table).