pub enum Ddr2Cmd {
Deselect,
Nop,
Active,
Read,
Write,
Precharge,
Refresh,
LoadMode,
}Expand description
A DDR2 command (JEDEC truth table over {CS#, RAS#, CAS#, WE#}, with CKE held high).
Variants§
Deselect
CS# high — the chip ignores the bus this cycle.
Nop
CS# low, RAS#/CAS#/WE# high — an idle active cycle.
Active
Open a row (RAS#).
Read
Column read (CAS#).
Write
Column write (CAS# + WE#).
Precharge
Close a row (RAS# + WE#); A10 selects single-bank vs all-banks.
Refresh
Auto-refresh (RAS# + CAS#), all banks precharged.
LoadMode
Mode/extended-mode register set (RAS# + CAS# + WE#); BA selects the register.
Trait Implementations§
impl Copy for Ddr2Cmd
impl Eq for Ddr2Cmd
impl StructuralPartialEq for Ddr2Cmd
Auto Trait Implementations§
impl Freeze for Ddr2Cmd
impl RefUnwindSafe for Ddr2Cmd
impl Send for Ddr2Cmd
impl Sync for Ddr2Cmd
impl Unpin for Ddr2Cmd
impl UnsafeUnpin for Ddr2Cmd
impl UnwindSafe for Ddr2Cmd
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