Struct DaeSchedule 

pub struct DaeSchedule {
    pub n_in: usize,
    pub layout: Vec<LoopCell>,
    pub result: Src,
    pub agu_len: usize,
    pub is_agu: Vec<bool>,
}

A decoupled schedule: the SAME cells re-laid-out as [agu lane .. | exec lane ..] (AGU cells first), with every Src::Val remapped to the new positions. agu_len cells form the address-generation lane; the rest are the exec lane (compute + memory tiles, memory ops preserving program order).

Fields

n_in: usize

layout: Vec<LoopCell>

result: Src

agu_len: usize

The number of leading layout cells that form the AGU lane (0 ⇒ nothing decoupled).

is_agu: Vec<bool>

For each layout cell, whether it belongs to the AGU lane (true) or the exec lane (false).

Implementations

impl DaeSchedule

pub fn agu_is_pure(&self) -> bool

Every AGU-lane cell must be a PURE address computation — never a heap tile. The structural heart of the decoupling: the address lane has no side effects, so hoisting it cannot reorder memory.

pub fn exec_lane_depth(&self) -> usize

The exec lane’s critical-path depth, treating every AGU-lane output as depth 0 (supplied by the parallel lane through the decoupling queue). This is the compute path the clock actually sees.

pub fn agu_lane_depth(&self) -> usize

The AGU lane’s own critical-path depth (runs concurrently with the exec lane).

pub fn decoupled_critical_depth(&self) -> usize

The throughput-limiting depth of the decoupled schedule: the two lanes run concurrently, so the clock sees the DEEPER of them — not their sum.

Trait Implementations

impl Clone for DaeSchedule

fn clone(&self) -> DaeSchedule

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for DaeSchedule

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.