pub fn decouple_access(
cells: &[LoopCell],
result: Src,
n_in: usize,
) -> DaeScheduleExpand description
Decouple a straight-line body into an AGU lane + exec lane. The AGU lane is the set of cells that
transitively feed a memory tile’s address AND whose dependency cone never crosses a load (untainted) — the
address arithmetic that can be precomputed off the compute path. Everything else (compute + the memory
tiles + any pointer-chase address whose cone reads memory) stays in the exec lane, in program order. The
two are concatenated AGU-first with every Src::Val remapped, so the layout is a valid topological
reordering of the SAME cells — semantics-preserving by construction.