Struct CudaTile 

pub struct CudaTile {
    pub bm: usize,
    pub bn: usize,
    pub bk: usize,
    pub tm: usize,
    pub tn: usize,
}

A point in the GEMM tiling lattice.

Fields

bm: usize

Block (output) tile height — rows of C computed per block.

bn: usize

Block (output) tile width — cols of C computed per block.

bk: usize

K-stage depth — contraction tiles staged through shared memory per iteration (bigger ⇒ more reuse per global load, up to the shared-memory budget).

tm: usize

Per-thread register-tile height.

tn: usize

Per-thread register-tile width.

Implementations

impl CudaTile

pub fn threads(&self) -> usize

Threads per block: one thread per tm×tn register sub-tile, so (bm/tm)·(bn/tn).

pub fn smem_bytes(&self) -> usize

Shared-memory footprint in bytes: the A stage (bm×bk) + the B stage (bk×bn), int8 = 1 byte per element, double-buffered (×2) so the next K-stage streams in while the current one computes.

pub fn is_legal(&self, gpu: &GpuLimits) -> bool

A point is legal iff it tiles the block evenly, is at least one warp, and fits the GPU’s thread and shared-memory budgets.

impl CudaTile

pub fn regs_per_thread(&self) -> usize

Registers per thread ≈ the tm·tn int32 accumulator tile plus ~24 for indices/fragments/loop state.

pub fn is_feasible(&self, gpu: &GpuLimits) -> bool

Feasible-for-construction: legal on the block budget AND at least one block fits the SM register file.

pub fn blocks_per_sm(&self) -> usize

Estimated resident blocks per SM (Ampere sm_86: 100 KiB smem, 65,536 regs, 1536 threads, ≤16 blocks) — the min over the four limiters. Bigger tiles (more regs/smem) → fewer blocks → less latency hiding.

pub fn occupancy(&self) -> f64

Occupancy fraction: resident warps / 48 (Ampere’s max warps per SM).

pub fn dram_traffic(&self) -> f64

DRAM traffic per unit of work (lower = better): global→shared reuse from the block tile. Each A element is read N/BN times, each B element M/BM times, so operand bytes ∝ 1/BM + 1/BN. EXACT byte count — no fitted constant.

pub fn smem_traffic(&self) -> f64

Shared-memory traffic per unit of work (lower = better): shared→register reuse from the thread tile. Each thread does TM·TN MACs per TM + TN shared loads, so shared bytes ∝ 1/TM + 1/TN. EXACT byte count — no fitted constant.

pub fn dominates(&self, other: &CudaTile) -> bool

Pareto dominance over the THREE physical axes — DRAM traffic ↓, SMEM traffic ↓, occupancy ↑ — with NO weights, NO fitted constants, no assumption about which matters more. self dominates other iff it is weakly better on all three and strictly better on at least one. A dominated tile cannot be the optimum (under the monotonicity assumption: less traffic and more occupancy never hurt), so it need not be measured. This is the assumption-free pruning that shrinks the space WITHOUT telling it the answer.

Trait Implementations

impl Clone for CudaTile

fn clone(&self) -> CudaTile

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for CudaTile

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for CudaTile

fn eq(&self, other: &CudaTile) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for CudaTile

impl Eq for CudaTile

impl StructuralPartialEq for CudaTile