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Module benchmarks

Module benchmarks 

Source

Re-exports§

pub use SolverSection_completions::Component::SolverSection;
pub use CodecSection_completions::Component::CodecSection;
pub use Benchmarks_completions::Component::Benchmarks;

Functions§

Benchmarks
Gate component: guarantees the data feeds are pinned before the page proper renders, so every accessor inside BenchmarksLoaded can expect its feed. Native builds (tests, SSG prerender) compile the data in and render directly; wasm fetches the staged /data bundle first, behind a lightweight shell.
CodecSection
The “Serialization — the wire codec” section: the LOGOS wire codec head-to-head against the industry serializers across wire size, encode, decode and single-field random access. Every figure is measured by the wirebench harness on the same logical data; the headline (“smallest wire on N/N workloads”) is provable, and the structured/affine showcase is fenced off from the fair results so the math-hack is never conflated with general data.
SolverSection
The “Our solver vs the field” section: per-family bar charts (ours vs Z3, Kissat, SaDiCaL) over the families where structure beats brute force, led by the pigeonhole wall. Bars are linear per row — the slowest fills the track, ours is its true fraction — so a microsecond refutation reads as the sliver it is. All numbers are measured by benchmarks/run-solver-vs-z3.sh; the framing is the honest one the data supports — SaDiCaL completes (we beat it), Z3 and Kissat hit the resolution wall.