Expand description
A minimal x86-64 instruction encoder for the contiguous register-allocated
region backend (compile_region_regalloc).
This is deliberately tiny: it covers exactly the instruction shapes the
linear-scan int backend emits — register/immediate moves, the three-operand
arithmetic the allocator lowers (via a two-address dst = lhs; dst OP rhs
discipline), compares + setcc, conditional and unconditional jumps with
late-bound labels, frame loads/stores (base + disp), prologue/epilogue
register save/restore, and ret. It is NOT a general assembler.
Register numbering follows the hardware encoding (rax=0 … r15=15); the REX
prefix and ModRM/SIB bytes are emitted directly. All emitted code is
position-independent except the jcc/jmp displacements, which are resolved
against final offsets by Asm::resolve before the bytes leave this module.
Structs§
- Asm
- The x86-64 byte emitter with late-bound labels.
- LabelId
- A label in the instruction stream. Created with
Asm::new_label, its position fixed withAsm::bind, and referenced by jumps; all references are patched inAsm::resolve.
Enums§
- Cond
- An integer condition, mapping to an x86 condition code. The first six are
SIGNED;
Cond::AeUis the one UNSIGNED code the array bounds check needs (jae— “above or equal”, unsigned>=), used so a 1-based index whoseidx - 1wraps negative (e.g. index 0) trips the OOB exit, matching the stencil’s(im1 as u64) >= (len as u64)guard. - Reg
- A hardware general-purpose register, by its 4-bit encoding.
- Xmm
- A hardware XMM register (SSE2), by its 4-bit encoding. f64 slots that win a
physical register live here for the whole function (a SECOND register class
alongside the GP
Regone); the rest spill to the frame. All XMM registers are caller-saved under SysV, so none need save/restore in the prologue.