pub fn run_nanos(
stmts: &[Stmt<'_>],
interner: &Interner,
types: Option<&TypeRegistry>,
iters: usize,
) -> Option<u128>Expand description
RUN-ONLY wall-time — the MIN nanoseconds over iters executions of the CHIP bytecode on the register
VM, compiled ONCE (so parse / compile / stdlib-prelude load are excluded). This is the fair host
counterpart to the FPGA soft-core’s on-chip cycle counter, which also measures execution only — and it
runs the SAME compile_for_chip bytecode the silicon executes, so VM-vs-FPGA is one instruction stream,
host CPU vs custom silicon. None if the program does not compile to the chip subset.