Module tensor_graph 

The tensor graph — programs as tensor ops, and the transforms over them.

front is the front end every tensor backend enters through: a program’s tensor statements lifted, in order, into typed ops. graph is the one IR those ops form, each tensor with its facts, and eval what a graph computes, equal to the VM. symbols registers every fusion class, its kind and an exemplar of its pattern. fuse is the shared optimizer — one table of rules over the graph, reading facts and asking each chip’s shim what it runs whole; numerics gives each product the quantized activation its chip reads. link resolves a graph against a chip’s shim before the chip’s own link builds it. smt states what a graph computes as terms, so a rewrite’s meaning is an obligation a solver discharges. vjp differentiates a tensor program in reverse mode, writing its backward pass as ordinary LOGOS.

Modules

eval

What a graph computes, answered without a chip: the evaluator every backend is held to.

facts

The dataflow facts every rule reads, computed once and kept current as ops are absorbed.

front

The front end of the one IR: the whole-program walk — every tensor statement of a program lifted, in order, into a typed spec over the shared recognizers, with its dataflow and its carried state named. Every tensor backend enters here (the CUDA lane, the older forward, the spatial pipeline, the D5005 engine); it is also reached by its older path, spatial::passes::recognize_stages.

fuse

The shared optimizer: one table of fusion rules over the one IR, decided once for every chip.

graph

The one IR: a cut of a model’s one program as the tensor ops it runs and the tensors they touch.

link

The link’s resolver: every op of a graph answered by a chip’s shim, before the chip’s own link builds anything.

numerics

Quantize insertion: every product that reads its activation quantized, as the chip’s shim asks, gets that activation’s quantized form — from its producer’s epilogue where the chip runs that whole (a *_quant class: the producer and the quantize as one op), or from a quantize op of its own right after the producer.

shim

What a chip allows: the one interface every chip answers through.

smt

The IR’s meaning as an SMT-LIB obligation: two graphs compute the same values for every input, and for every meaning of the ops neither pins down.

symbols

The class registry: every fused symbol, primitive, edge layout and schedule property the book names, registered before its rule exists, so a fusion mined from another stack has a place to land.

vjp

Reverse-mode differentiation of a tensor program, as a program.