pub fn place_activations(p: &mut SpatialProgram, target: &SpatialTarget)Expand description
★ PLACE THE INTERMEDIATES. Where target holds tensors on chip, each chip’s intermediates are allocated over their
live ranges in the SRAM its buffers leave; where it does not, or past what fits, they stay in the tier they were
declared in. A live set past the SRAM spills, at the first phase it overflows, the intermediate live there whose
last use is furthest away — then the largest, then the lowest id — until every phase fits.
One sweep over the phases per chip (linear scan): a range joins the live set at its first phase and leaves after its
last, the live bytes are kept as a running sum, and an overflow spills from the live set ordered by last use. A
spill only lowers the phases after it, and every phase before already fit, so the sweep never looks back — the
same intermediates spill as re-searching from the first phase would, in O(n log n).