Module fit 

The fit report — what a model or a workload needs from an RDU, sized against ONE source of chip facts (RduChipFacts) and written down with every number labeled.

Two reports and a plan:

• gemm_fit — an int8 GEMM lowered through the spatial pipeline onto the chip: its arithmetic, its working set against the SRAM, the VERIFIED program’s census, the certificate that rechecks, and the II view on the chip’s unit model.
• qwen38_fit — Qwen3.8-27B (the forward authored in LOGOS, gen_qwen38_lg) on the chip: the weights by storage, per-layer MACs and arithmetic intensity, the KV cache, the Gated-DeltaNet memory and the conv rings, the peak live set of activations, residency tiers, and tensor-parallel sharding over a node and a rack of RDUs with the HBM verdict at the model’s full context.
• vllm_plan — the deployment plan the fit implies for the vendor’s vLLM backend: model id, TP, dtype, max-model-len, the op list the backend must support, the state each layer keeps.

★ DERIVED, NEVER TYPED. Every model number is a function of Qwen38Cfg and of the authored program’s own declarations and statements — the tensor inventory is read from gen_qwen38_lg’s output, the MACs from its matmul/attention/gated delta/causal conv statements, the live set from a liveness walk over its Let chain. Every chip number is a Fact with its provenance. The generator locks grep this file and its examples for bare literals; a number a reader cannot trace to the config, the program or the facts cannot land here.

★ NO TIME. Nothing here ran on an RDU. No field is a duration, a rate of ours, or a speed; the vendor’s published peak rates travel only under their published label with a citation, and no_speed_claim is true on every artifact. The II block spells modeled cycles on the unit model, never latency.

Structs

CertificateSummary

CfgBlock

ChipBlock

The chip as the fit sees it: every vendor number under its own label, the derived per-PCU budget modeled, the descriptor’s modeled ledger and the sources.

Cited

A chip number with its provenance spelled the way the fit artifacts spell it (published/modeled).

EmbeddingBlock

FromFit

GemmArithmetic

GemmFit

GemmOperand

GemmResidency

GemmTiles

GemmWorkload

IiBlock

The II view of a placed program — rdu_ii_report with cycles spelled as cycles.

IiCreditRow

One IR edge’s credit loop on the unit model.

IiStageRow

One compute stage on the unit model: its IIs and the cycles to its result.

KvAtCtx

KvTier

LayerRow

LmHeadRow

ModelBlock

ProgramSummary

Qwen38Fit

ResidencyBlock

ServingPlan

How Qwen3.8 is served on a chip’s scale-up domain at one context length — every choice read off the chips’ memory hierarchy and topology and the model’s structure, none typed. provenance: modeled; no field is a time.

StatePerLayer

TensorLine

One tensor of the authored forward, as it is declared there.

TensorParallelBlock

Tiers

TotalsBlock

TpRefusal

Why a tensor-parallel width does not split a model.

TpRow

UnitModelBlock

The unit model with every value under the fit’s labels.

VllmChip

VllmModel

VllmPlan

VllmServe

WeightsBlock

Enums

FitReport

Storage

TensorClass

Constants

BF16_BYTES

DEPLOYMENT_DTYPE

The dtype the deployment is sized in.

F32_BYTES

FIT_SCHEMA

FIT_VERSION

GEMM_FIT_PATH

GEMM_FIT_TILES

The GEMM fit’s workload, in the chip’s native tiles: an 8×8-tile output over 4 k-tiles.

GEMM_GENERATED_BY

HONESTY

PROVENANCE_DERIVED

PROVENANCE_MEASURED

PROVENANCE_MODELED

PROVENANCE_PUBLISHED

Q8_0_BLOCK

GGUF Q8_0: a block of 32 int8 quants carries one f16 scale.

Q8_0_LAYOUT

Q8_0_SCALE_BYTES

QWEN38_FIT_PATH

QWEN38_GENERATED_BY

QWEN38_GGUF

The GGUF our own CUDA lane runs from — NOT what vLLM loads.

QWEN38_HF_INHERITS

QWEN38_HF_MODEL_TYPE

The HF model_type, and the architecture it inherits in vLLM (the hybrid Gated-DeltaNet + attention).

QWEN38_MODEL_ID

The HF checkpoint a vLLM run loads (safetensors, bf16).

VLLM_PLAN_PATH

VLLM_PLAN_SCHEMA

Functions

admits_tp

★ A TENSOR-PARALLEL WIDTH IS A FACT ABOUT THE MODEL AS MUCH AS THE CHIPS. Megatron splits attention and the Gated DeltaNet BY HEAD and the FFN and the vocabulary by column, so tp must divide the query heads, both GDN head counts, the FFN width and the vocabulary; the KV heads either split across the chips or replicate over them evenly (kv % tp == 0 or tp % kv == 0). Any other width is refused by the serving stack before a weight loads — vLLM: “Total number of attention heads (24) must be divisible by tensor parallel size (16)”. The widths the author does not yet split a layer over — a latent attention, an expert mixture, an attention with biases or sinks — are refused by its own name for what is missing (author::check_tp).

default_tensor_parallel

The tensor-parallel width the plan brings: one SambaRack where the vendor tabulates it, else one node.

gemm_fit

The int8 GEMM C(m×n) = A(m×k)·B(k×n) lowered onto facts’ chip.

gemm_fit_shape

The GEMM fit’s (m, n, k) on a target: GEMM_FIT_TILES in that target’s tile geometry.

q8_0_bytes

The bytes a Q8_0 tensor of elems occupies: the quants plus one f16 scale per (partial) block.

qwen38_admits_tp

admits_tp for the Qwen3.8 configuration the fit report sizes.

qwen38_fit

Qwen3.8 on facts’ chip, sharded over tp RDUs, with the KV cache sized at context ctx.

qwen38_op_list

The ops the authored forward is made of, with the shapes the backend must support — every number from the config.

qwen38_serving_plan

Qwen3.8’s serving plan on facts’ chips at context ctx: the tensor-parallel width the model’s heads admit within the scale-up domain, the rest of the domain as data-parallel replicas, and how many sequences a replica holds — HBM-bound by each sequence’s carried state beside the chip’s weight slice, SRAM-resident as far as each sequence’s per-step working set allows. The per-chip bytes are the fit report’s own (qwen38_fit).

qwen38_tensor_parallel

The tensor-parallel width Qwen3.8 is served at on facts’ chips: the widest the model admits (qwen38_admits_tp) within the chips’ tensor-parallel domain (default_tensor_parallel); the rest of the domain serves more sequences as data-parallel replicas.

qwen38_tensors

Every tensor the authored forward declares — read from gen_qwen38_lg’s own output and classified by the manifests it returns (Q8_0 matrices vs f32 tensors; the hidden state is the one undeclared-in-the- manifests activation) — plus the embedding table the decode step gathers its input row from.

render

Pretty JSON with one trailing newline — the byte form every fit artifact is pinned in.

vllm_plan

The plan the fit implies for the vendor’s vLLM backend at the model’s full context.