Module vector 

The vector unit’s instruction set: sixteen f32 lanes over vector and scalar registers, every instruction one of the engine’s f32 operations in the order super::numerics defines it, so a micro-program computes what the numerics function it is written from computes, bit for bit.

An instruction over a vector runs element i in lane i mod 16: elementwise ones lane by lane, Dot and Sum accumulating each lane in index order and folding the lanes by the pairwise tree (super::numerics::fdot), Max, AbsMax and ArgMax each lane’s largest folded the same way, an order the result does not depend on (super::numerics::fmax, super::numerics::absmax, super::numerics::argmax). Scalars are the reductions’ results and the constants a program loads. The micro-programs here are the norms, the softmax, the gated products, the decay a Gated-DeltaNet block takes, the rotary turn, a cache row’s int8 codes, the causal convolution and the greedy token, each the numerics function it replaces.

Structs

Regs

The registers a program runs over.

Enums

Bin

A two-operand f32 operation.

Func

A function a lane applies to one element.

Op

One instruction.

Functions

cache_row

A cache row as int8 (super::numerics::cache_row): the stored scale amax/127 rounded to f16 into s[scale], the codes under its reciprocal into v[codes]. Scalar s[scale] + 1 is its scratch.

conv

The causal convolution of a Gated-DeltaNet block’s channels through SiLU into v[out] (super::numerics::conv): the ring’s rows v[ring[j]], oldest first, against the kernel’s taps v[taps[j]], then the token’s row v[x] against the last tap, each channel’s products summed in tap order from +0, a multiply-add a tap. The kernel is held tap by tap (taps[j]_ch the channel’s tap j); v[acc] is its scratch, scalar 0 the zero.

delta_gates

Every value head’s decay and gate at once from the vectors v[alpha], v[dt], v[a], v[beta]: the decay exponents softplus(α + dt)·a into v[log_decay], the decays into v[decay], the gates σ(β) into v[gate].

gdn_gates

A Gated-DeltaNet head’s decay and gate from the scalars s[alpha], s[dt], s[a], s[beta]: the decay exponent softplus(α + dt)·a into s[log_decay], the decay exp of it into s[decay], the gate σ(β) into s[gate].

gdn_out

A Gated-DeltaNet head’s read normalized by the weights v[w] and gated by silu(v[z]) into v[out], n the head’s width. v[t] and scalars 0..2 are its scratch.

greedy

The greedy token of the logits v[x] into s[d].

l2norm

L2 normalization of v[x] into v[out]: x·rsqrt(Σx² + ε). Scalars 0..1 are its scratch.

rmsnorm

RMSNorm of v[x] by the weights v[w] into v[out], n the vector’s length: rsqrt(Σx²·(1/n) + ε), then each x·r·w, 1/n the reciprocal at fp held as a constant. Scalars 0..2 are its scratch, v[t] too.

rotary

A head turned by its position’s rotary table into v[out] (super::numerics::rope).

run

Run program over regs, every product on fp.

sigmoid_gate

Attention’s output gate v[o]·σ(v[g]) into v[out], v[t] its scratch.

softmax

The softmax of the scores v[x] into v[out]: the maximum, each exp(s − max), their sum, one reciprocal, the products. Scalars 0..1 are its scratch.

swiglu

The FFN’s gated product silu(v[g])·v[u] into v[out].

Type Aliases

SReg

A scalar register.

VReg

A vector register.