pub fn secded_check_byte(word: usize) -> usizeExpand description
The ECC lane holding word w’s check byte: bus byte 64 + 7 − w. The controller’s 576-bit word is either the
memory burst’s eight beats of 72 DQ pins each (bus bit i on pin i mod 72), or its eight beats of the 64 data
pins beneath the eight beats of the eight ECC pins (data bit i on pin i mod 64, ECC bit e on pin
64 + e mod 8). Under either, word w‘s data bits and ECC lane 7 − w lie on 72 different pins, so a failing pin
flips one bit of each codeword, which the code corrects; pairing word w with lane w holds only under the
second. Were the bus word each group of eight pins’ beats in turn, no grouping of whole bytes would hold under all
three.