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Module verilog

Module verilog 

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Verilog Extraction: Kernel Term → SystemVerilog

Converts kernel proof terms (which ARE circuits under Curry-Howard) into synthesizable SystemVerilog source code.

§Extraction Rules

Kernel TermSystemVerilog Output
Global("bit_and") applied to a, ba & b
Global("bit_or") applied to a, ba | b
Global("bit_not") applied to a~a
Global("bit_xor") applied to a, ba ^ b
Global("bit_mux") applied to s, a, bs ? a : b
Global("B0")1'b0
Global("B1")1'b1
Var(name)name

Functions§

term_to_verilog
Convert a kernel Term to a SystemVerilog expression string.