pub fn dram_read_tiles(
spec: &MatmulSpec,
cfg: &TileConfig,
strategy: MatmulStrategy,
) -> u64Expand description
DRAM operand-tile reads modeled for each strategy (in 32×32 tiles) — the traffic that separates the
three matmul plans. Simple re-streams both operands for every output tile (no reuse). BlockReuse
holds A/B blocks in L1 and reuses them across a DST sub-block, but EVERY core still reads its blocks
from DRAM, so an operand tile is fetched once per grid column (A) / row (B) — redundantly. ReuseMcast
reads each operand block once and NOC-multicasts it across its row/column, so every A and B tile is
read from DRAM exactly once — the fewest possible. This is the mechanism behind the vendor’s win; the
device-cycle confirmation is a ttsim run (traffic is necessary, not sufficient — overlap also matters).
A thin facade over crate::spatial::cost::dram_tiles, which owns this arithmetic now. The NAME
stays here on purpose: spatial_cost_model_lock::no_strategy_enum_input_exists greps spatial/ for
it, so the computation moves and the strategy-shaped vocabulary does not follow it.