pub fn emit_wprog_engine_soc_verilog_hw_probed(name: &str) -> StringExpand description
The deployed hold-safe engine (emit_wprog_engine_soc_verilog_hw) with its observer ports: the same logic and
caps, plus probe_{running, st, pc, cell, sp, hp, cycles} outputs wired straight from the engine’s own registers, for
the Fabric Terminal’s activity panel.