Constant WPE_STREAM_MAXV 

pub const WPE_STREAM_MAXV: usize = 512;

Depth of the per-block cell-value scratch array v (v[0:MAXV-1]). v is indexed ONLY by a cell’s position WITHIN ITS BLOCK (mode-2 operands + the v[ci] write), never by the flat blk_cell_ptr + ci, so it needs to hold only the MAX cells in any SINGLE block — not the whole-program MAXCELL total. The streamed transformer’s largest block is 116 cells; a wider straight-line block (the postsynth high-register lock’s 90-value sum lowers to a single 270-cell block) needs more, so MAXV=512 covers the family. Under ConfigBram (the streamed engine

• every postsynth lock) v is BLOCK RAM with a registered read (v_ra/v_rd), so the depth costs a RAMB tile, not a combinational mux; the flip-flop-backed combinational resolve/resolve0 reads only exist under the Registers/Bram backends, which use the SMALL WPE_SYNTH_* profile — untouched by this. A block deeper than MAXV aliases its own cells (the corruption postsynth_high_register_index_matches_vm caught: 270 > the old 128).