pub fn emit_systolic_os_pipelined_verilog_bits(
name: &str,
os: &SystolicOs,
bits: u32,
) -> StringExpand description
Emit the output-stationary pipelined array at precision bits with a full (64-bit) accumulator.
pub fn emit_systolic_os_pipelined_verilog_bits(
name: &str,
os: &SystolicOs,
bits: u32,
) -> StringEmit the output-stationary pipelined array at precision bits with a full (64-bit) accumulator.