Expand description
Sprint 5C: Top-Level Synthesis API
Single entry point for hardware synthesis from English specifications. Orchestrates: parse → encode → tactic proof search → extract Verilog.
Structs§
- Synthesis
Config - Configuration for the synthesis pipeline.
Enums§
- Synthesis
Result - Result of the synthesis pipeline.
Functions§
- synthesize_
from_ spec - Synthesize a hardware circuit from an English specification.