Struct SimtPorts 

pub struct SimtPorts {
    pub verilog: String,
    pub latency: u32,
}

A ports engine’s RTL and the clocks from a step’s operands to its results.

Fields

verilog: String

latency: u32

Trait Implementations

impl Clone for SimtPorts

fn clone(&self) -> SimtPorts

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SimtPorts

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for SimtPorts

fn eq(&self, other: &SimtPorts) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl StructuralPartialEq for SimtPorts