pub fn emit_simd_fmul_f32x2_verilog() -> StringExpand description
Emit the packed F32×2 multiply tile: two fp32_mul lanes in parallel. Module name simd_fmul_f32x2.
Compile alongside FP32_MUL_V; proven ≡ eval_lanewise_fmul_f32x2 under iverilog.