Function emit_isa_core_decoder_verilog 

pub fn emit_isa_core_decoder_verilog() -> String

Emit the ISA opcode decoder for the reversible core — the silicon FRONT-END that turns a wire opcode BYTE (the exact byte crate::vm::binisa::encode_program puts on the wire) into the reversible ALU’s 3-bit control select plus a core valid flag. The case labels are DERIVED from crate::vm::binisa::opcode, so the decoder and the wire format share ONE source of truth: the byte the network carries is the byte the chip decodes, with no translation layer. Compose with emit_reversible_alu_core_verilog — wire isa_core_decoder.sel → rev_alu_core.op.