Expand description
R5 — the SVA REVERSE-MODULE OBLIGATION for Hardware Studio.
A Silicon functional unit U is reversible iff there exists a module R with R ∘ U = id. This
discharges that obligation for a combinational unit THREE independent ways that MUST AGREE:
- Exhaustive bit-blast — the unit’s
2ⁿ-row truth table is a permutation (each output distinct); its inverse permutation IS the constructive reverse moduleR. - Algebraic certificate — for a linear (CNOT/XOR) unit, its GF(2) transfer matrix is
invertible (
∈ GL(n,2)); reused fromlogicaffeine_proof::revgate. - Z3 equivalence — (behind the
verificationfeature)check_z3_hw_equivalenceproves the composedR ∘ Ustructurally equals the identity.
The obligation FAILS LOUDLY if any two discharged methods disagree — the “our bit-blaster == Z3 ==
algebra” pattern from phase_hw_native_vs_z3.rs, now for reversibility. It emits the SVA property
that pins R(U(x)) == x, the hardware-level twin of the software forward ; reverse ≡ id lock.
Structs§
- Journaled
Injectivity - A discharged JOURNALED-op injectivity obligation — the hardware twin of the software minimal-bit
journaling (corner 1). A
JournaledopFis many-to-one (it erases), but AUGMENTED with its Bennett ancillaJ(the journal entry — the exact bits it destroyed), the mapx ↦ (F(x), J(x))is INJECTIVE: the reverse module reconstructsxfrom the post-state AND the ancilla. This closes the R4 gap — the Z3/exhaustive proofs covered theBijectioncore, and this covers everyJournaledop the same way. - Reverse
Module Obligation - A discharged reverse-module obligation: the constructive reverse gate plus the SVA property that
pins the reverse-module identity, produced only when every attempted method AGREED that
Uis reversible.
Functions§
- discharge_
journaled_ injective - Prove a
Journaledop is INJECTIVE once augmented with its Bennett ancilla.augmented[x]is the packed(F(x), J(x))output for inputx(all2^in_bitsinputs present). Injective iff every packed output is distinct — an EXHAUSTIVE bit-blast, the same rigor ascertify_gate, so the core needs no SMT solver. Fails loud on a collision: two inputs share an augmented output, so the ancilla did NOT capture the erased bits — a genuine (un-reversible) Landauer erasure. - discharge_
reverse_ module - Discharge the reverse-module obligation for the
n-bit combinational unittruth_table. Proves reversibility by exhaustive bit-blast AND — whenlinear_rows(the GF(2) transfer matrix) is given — the algebraic GF(2) certificate, and REQUIRES the two verdicts to agree. On success returns the reverse module + SVA property; on failure names the erasure or the method disagreement.