Function emit_keccak_top_verilog 

pub fn emit_keccak_top_verilog() -> String

Emit a NARROW-BUS wrapper around keccak_core so it place-and-routes on a real FPGA: the bare core exposes a 1600-bit parallel state port (fine for simulation, but 1600 pins exceed any FPGA’s IO), so keccak_top streams the 25 lanes in and out over a 64-bit bus addressed by a 5-bit lane index. we writes din to lane idx; go launches the permutation; done marks completion; dout reads lane idx of the result. ~140 IOs — routes on the ECP5.