pub fn eval_seq_program(pf: &ProgramCfgFabric, params: &[i64]) -> i64Expand description
The faithful MODEL of the whole-program SEQUENCED fabric (emit_seq_program_verilog): walk blocks by a PC,
evaluating each block’s cells in order (threading ONE shared heap = the state plane) and taking the terminator
(Jump/Branch/Return), exactly as the block-walk FSM does in RTL. This is the sequenced fabric’s own oracle —
distinct from run_program_cfg_on_grid (which models the GRID realization and cannot place a looping heap
body). Bit-identical to the VM’s Int for a lowered program. budget bounds the block walk (a loop that
never returns panics, catching a lowering back-edge bug — never a silent hang).