Function emit_seq_program_verilog 

pub fn emit_seq_program_verilog(name: &str, pf: &ProgramCfgFabric) -> String

Emit the DONE-AWARE whole-program sequenced fabric (seqprog_{name}): the per-block sequenced datapaths (seqblk_*, each with multi-cycle division/float TILES) + a block-PC FSM that STARTS the current block, waits its done, latches the register writes, and takes the terminator (Jump/Branch/Return). This is the unification — one whole program (loop + division + float) on one spatial fabric, latency-insensitive. Proven == run_program_cfg_on_grid == the VM by iverilog.