Function emit_float_datapath_verilog 

pub fn emit_float_datapath_verilog(name: &str, df: &DecisionFabric) -> String

Lower a pure-float-arithmetic DecisionFabric to a SEQUENCED float datapath binding fpu.v (see the block comment above). Each cell is one multi-cycle FPU step; the streamed result is the f64 bit-pattern of the final float. Panics on any non-float-arith cell (the honest boundary — FFloorF/Arith are not bound here).