pub fn route_leveled(cells: &[FabricOp], n_in: usize, result: usize) -> GridExpand description
AREA-MINIMIZING placer (level scheduling). The naive route_straight_line gives every
cell two rows (a routing row + a compute row). But a cell whose operands are all global inputs
or constants (topological LEVEL 0) needs NO routing row — its operands are tapped directly — so
all level-0 cells share ONE compute row (row 0), packed across columns. Deeper cells still get
their own routing+compute rows. For DAGs with input-parallelism this collapses the row count
(a chain saves a little; a wide fan-in tree saves a lot). Correctness is unchanged — the S3 SAT
proof validates the compact placement exactly as it did the naive one.