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emit_config_grid_verilog

logicaffeine_compile::codegen_sva::fabric_grid

Function emit_config_grid_verilog 

Source 
pub fn emit_config_grid_verilog(
    name: &str,
    grids: &[&Grid],
    cfg_width: u32,
) -> String
Expand description

Emit the N-CONFIG reconfigurable array as combinational RTL — the synthesizable twin of time_mux_n_bounded. ONE rows×cols tile grid runs ANY of grids selected by a cfg-bit config word: every tile computes all N fabrics’ drives over the SHARED (config-muxed) neighbour channels and selects by cfg; the result muxes the N output taps. grids must share dimensions (pad with pad_grid first). This is what a fabric_soc flashes: send cfg (the block index from the bytecode frame) + the inputs and the ONE array becomes that block’s datapath — proven semantics-preserving by certify_config_table.