pub fn emit_ddr2_command_encoder_verilog() -> StringExpand description
Emit the combinational ddr2_cmd_encoder — op field + issue → DDR2 command pins. When
issue is low the bus holds NOP (CS# low, RAS#/CAS#/WE# high). The case arms are GENERATED
from ddr2_pins, so the netlist is by-construction consistent with the model/oracle.