Function emit_dpu_ingest_verilog 

pub fn emit_dpu_ingest_verilog() -> String

Emit the DPU near-data ingest tile: the same per-lane join as crdt_merge, but wrapped in a clocked accumulator — on each posedge clk with in_valid, the state folds the arriving beat into the running join (acc <= merge(acc, in_state)); rst clears it. This is the sequential merge-on-ingest primitive a DPU runs at the data edge: because the join is commutative/associative/idempotent (certified in the_crdt_convergence_order_is_a_total_order_proven_by_our_sat), folding a stream through it is order-invariant — correct even when the controller delivers reads out of logical order. Unlike the combinational crdt_merge unit, this has genuine register-to-register paths, so it is the block that carries meaning through STA/signoff.