pub fn emit_coproc_soc_verilog() -> StringExpand description
Emit the flashable SoC wrapper: coproc_core + a 7-state UART-TX readout FSM. External pins
(clk, rst, uart_tx, led[7:0]) fit the ULX3S; CLKS_PER_BIT = clk_hz / baud (217 for
25 MHz / 115200). The RTL is operand-independent — the core carries the operands internally.