Function check 

pub fn check(graph: &TimingGraph, plan: &Plan) -> bool

Whether plan pipelines graph: every edge’s register count is the difference of its ends’ stages, never below zero and zero out of a node its policy puts no register after; every input at stage 0 and every output with the registers to reach the latency; every named net’s registers the most its readers and the latency need; and no path between registers deeper than the period.