Struct SassInsn 

pub struct SassInsn {
    pub offset: usize,
    pub lo: u64,
    pub hi: u64,
}

One decoded SASS instruction: its byte offset within the .text section and the raw 128-bit encoding.

Fields

offset: usize

lo: u64

hi: u64

Implementations

impl SassInsn

pub fn ra(&self) -> u8

Source operand register Ra (Ampere: low word bits [24:31]). 255 = RZ (the zero register).

pub fn rb(&self) -> u8

Source operand register Rb (low word bits [32:39]) — only a real register for register-form opcodes.

pub fn rd(&self) -> u8

Destination register Rd (low word bits [16:23]).

impl SassInsn

pub fn writes_for(&self, class: SassClass) -> Vec<u8>

The registers this instruction WRITES, given its execution class (from the nvdisasm mnemonic), SOUNDLY over-approximated — never under-count, or the scheduler would drop a real hazard. Multi-register producers (IMMA’s 4-reg accumulator, wide LDSM/LDG) claim a conservative range from Rd; stores/control write nothing.

pub fn reads_for(&self, class: SassClass) -> Vec<u8>

The registers this instruction READS, given its class, soundly over-approximated. ALU/FP read Ra,Rb; tensor ops also read accumulator (Rd..) + A-frag (Ra..) + B-frag (Rb..); stores read data Rd + addr Ra.

Trait Implementations

impl Clone for SassInsn

fn clone(&self) -> SassInsn

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SassInsn

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for SassInsn

fn eq(&self, other: &SassInsn) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SassInsn

impl Eq for SassInsn

impl StructuralPartialEq for SassInsn