pub fn assign_minimal_stalls(cubin_path: &Path) -> Option<Vec<u8>>Expand description
CONTROL-CODE ASSIGNER (perf): compute the MINIMAL stall per instruction from the fixed-latency dependency
timing, keeping ptxas’s memory barriers. We walk the instruction order tracking the cycle each register’s
fixed-latency result becomes ready; each instruction issues at the max of (prev issue + 1) and its
producers’ ready cycles; the stall between two instructions is exactly that gap (clamped to [1,15]). This is
the tightest schedule that still satisfies every fixed-latency hazard — if ptxas over-stalled anywhere, ours
is faster; if it was already minimal, ours matches. Correctness is guarded on-device (a too-tight stall that
violates a hazard we don’t model shows up as a wrong result). Returns the patched cubin bytes.