pub fn bit_serial_add(
df: &mut DramDataflow,
a: &[usize],
b: &[usize],
carry0: usize,
) -> Vec<usize>Expand description
Bit-serial ripple-carry ADD over B bitplanes (SIMD across the lanes packed in each row):
for each bit i, sum_i = a_i XOR b_i XOR carry, carry = MAJ(a_i, b_i, carry). a/b are the
operand-plane row indices (LSB first); carry0 is a zero row. Returns the B sum-plane rows.
Composed entirely from the {AND, OR, NOT} basis — arithmetic emerging from boolean dataflow.