pub struct Qwen30bCfg {
pub d: usize,
pub dff: usize,
pub ne: usize,
pub k: usize,
pub layers: usize,
pub h: usize,
pub kv: usize,
pub hd: usize,
pub vocab: usize,
pub rope_theta: f64,
pub rms_eps: f64,
pub attn_split: usize,
}Expand description
The Qwen3-30B-A3B architecture (n_layer is overridable to keep local emit/compile fast; the per-layer shape is identical to the real model).
Fields§
§d: usize§dff: usize§ne: usize§k: usize§layers: usize§h: usize§kv: usize§hd: usize§vocab: usize§rope_theta: f64RoPE base frequency (<arch>.rope.freq_base in the GGUF). Read it from the checkpoint — it was a
hardcoded 1e6 in the emitted CUDA until Qwen3.8-27B arrived with 1e7, which would have silently
mis-rotated every query and key while still producing plausible-looking tokens.
rms_eps: f64RMSNorm epsilon (<arch>.attention.layer_norm_rms_epsilon). Also formerly hardcoded.
attn_split: usizeSplit-K factor for the flash-attention lane. Per-chip tuning knob, not a model property: measured best at 4 on the A100 and 8 as the portable default.
Implementations§
Source§impl Qwen30bCfg
impl Qwen30bCfg
Auto Trait Implementations§
impl Freeze for Qwen30bCfg
impl RefUnwindSafe for Qwen30bCfg
impl Send for Qwen30bCfg
impl Sync for Qwen30bCfg
impl Unpin for Qwen30bCfg
impl UnsafeUnpin for Qwen30bCfg
impl UnwindSafe for Qwen30bCfg
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