Struct AnalogTarget 

pub struct AnalogTarget {

    pub name: &'static str,
    pub rows: usize,
    pub cols: usize,
    pub mul_tiles: usize,
    pub rails_v: (Volts, Volts),
    pub headroom: f64,
    pub cells: BTreeSet<AnalogCellKind>,
    pub sum_fanin: usize,
    pub weight_bits: u8,
    pub weight_range: (f64, f64),
    pub mul_vref_options_v: Vec<Volts>,
    pub scale_log2_range: (i32, i32),
    pub dac_bits: u8,
    pub adc_bits: u8,
    pub n_dac: usize,
    pub n_adc: usize,
    pub integrator_k_range: (Hertz, Hertz),
    pub settle_ns: Nanoseconds,
    pub provenance: &'static str,
}

A described analog fabric. One lowering retargets across shapes by varying this descriptor; each demand is either realizable on it or refused with a typed AnaUnplaceable.

Fields

name: &'static str

Human name (carried into refusal errors).

rows: usize

Described tile-array dimensions (physical tile SITES; the linear/multiplier mix below says what populates them).

cols: usize

mul_tiles: usize

Multiplier tiles among the sites — the scarce resource (DSP-block discipline).

rails_v: (Volts, Volts)

Supply rails in volts, (low, high). Signals are differential around mid-rail; the usable signed span is ±headroom·(high−low)/2.

headroom: f64

Usable fraction of the differential half-span (clipping guard band).

cells: BTreeSet<AnalogCellKind>

The tile kinds this target provides.

sum_fanin: usize

Hard per-tile summing fan-in (a physical resource: node loading, settling, noise). The compiler trees larger sums.

weight_bits: u8

Weight resolution: sign + magnitude from matched unit elements. A programmed weight is quantized to weight_lsb steps; the snap error is a budget term.

weight_range: (f64, f64)

Realizable programmed weight magnitudes, (min, max) — the unit-element range.

mul_vref_options_v: Vec<Volts>

The DISCRETE realizable multiplier normalization references in volts. A Mul-bearing graph’s block scale must land on a member (or refuse) — see the module doc.

scale_log2_range: (i32, i32)

The block-scale exponent range the fabric’s references/biasing support (volts-per-math-unit = 2^e, e ∈ [min, max]).

dac_bits: u8

DAC / ADC converter resolutions in bits.

adc_bits: u8

n_dac: usize

DAC input / ADC output channel counts.

n_adc: usize

integrator_k_range: (Hertz, Hertz)

Realizable integrator rates gm/C in 1/s, (min, max).

settle_ns: Nanoseconds

Per-tick DC settling budget in nanoseconds (linear tile; the multiplier and longer routing legs get their own figures with the characterization phases).

provenance: &'static str

Sourcing statement: which figures are cited physical facts and which are modeled-design parameters. Pinned verbatim by analog_target_lock — changing sourcing is a conscious edit.

Implementations

impl AnalogTarget

pub fn ideal() -> AnalogTarget

IDEAL — the abstract superset preset: every tile kind, generous converters and ranges, no non-ideality. Even the ideal preset keeps the PHYSICAL DISCIPLINES finite (fan-in, quantized weights, discrete references) so every certification exercises the real compiler obligations. Makes NO physical claims.

pub fn sky130_fpaa() -> AnalogTarget

SKY130-FPAA — a modeled FPAA on the open SkyWater SKY130 process, in the deliberately boring V1 shape: a 16×16 site array with a scarce multiplier population, differential linear tiles with 8-bit unit-element weights and fan-in 8, modest converters, and ~8 effective bits as the accuracy ambition.

The rail is the ONE sourced physical figure: SKY130’s nominal digital-domain supply is 1.8 V (SkyWater SKY130 PDK, sky130_fd_pr device models; skywater-pdk.readthedocs.io). Everything else is OUR modeled fabric’s design parameters — design choices, not silicon measurements. The non-ideality physics (mismatch sigmas, parasitics, noise floor) ships in its own phase with cited constants; until then this preset carries none rather than invented ones.

pub fn half_span_v(&self) -> f64

The usable differential half-span in volts (headroom · (rail_hi − rail_lo) / 2).

pub fn weight_lsb(&self) -> f64

The weight quantum: the smallest programmed-weight step the unit elements realize. Sign+magnitude with weight_bits total ⇒ 2^(weight_bits−1) − 1 magnitude steps over weight_range.1.

pub fn provides(&self, cap: AnalogCapability) -> bool

Whether this target provides a discrete capability.

pub fn require_gain_ratio(&self, needed: f64) -> Result<(), AnaUnplaceable>

Gate a required programmed weight/gain magnitude against the realizable range.

pub fn require_integrator_rate( &self, needed_per_s: f64, ) -> Result<(), AnaUnplaceable>

Gate a required integrator rate (gm/C, 1/s) against the realizable range.

pub fn require_mul_reference(&self, needed_v: f64) -> Result<(), AnaUnplaceable>

Gate a required multiplier reference voltage against the discrete realizable set (exact match — the schedule chooses FROM this set, it does not approximate into it).

Trait Implementations

impl Clone for AnalogTarget

fn clone(&self) -> AnalogTarget

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for AnalogTarget

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for AnalogTarget

fn eq(&self, other: &AnalogTarget) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl StructuralPartialEq for AnalogTarget